Correction of the Duration of Error Pulses in CMOS Combinational Logic Elements when Collecting Charge from Tracks of Single Particles

V. Ya. Stenin; Yu. V. Katunin

Vestnik natsional'nogo issledovatel'skogo yadernogo universiteta "MIFI"
Vestnik natsional'nogo issledovatel'skogo yadernogo universiteta "MIFI"

ISSN 2304-487X (Print)

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Stenin V.Ya., Katunin Yu.V. Correction of the Duration of Error Pulses in CMOS Combinational Logic Elements when Collecting Charge from Tracks of Single Particles. Vestnik natsional'nogo issledovatel'skogo yadernogo universiteta "MIFI". 2020;9(3):226-235. (In Russ.) https://doi.org/10.1134/S2304487X20020145

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ISSN 2304-487X (Print)

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